Despite the current industry slowdown, many companies are continuing to produce new architectures for DSP applications. At the upcoming Microprocessor Forum, two startups and one established player— Siroyan, 3DSP, and LSI Logic, respectively—will disclose next generation high performance licensable DSP core architectures.
Siroyan will unveil the SRA328—an architecture that uses VLIW techniques and integrates DSP, RISC, and MMU technology. The SRA328 can have up to 32 separate execution
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Intrinsity, a startup in Austin, Texas, recently disclosed its new Fast14 technology—a collection of design techniques that enable high-speed dynamic logic to be implemented on standard CMOS processes. This technology will facilitate clock speeds of up to 2.2 GHz. Intrinsity plans to apply this new technology to developing its own high-end embedded processors, which most likely will target the wired and wireless communications infrastructure markets.
Fast14 Technology achieves its speed
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At the thirteenth annual Hot Chips Conference held at Stanford University, Professor Jan Rabaey of UC Berkeley's Wireless Research Center presented an engaging tutorial on silicon platforms for next-generation wireless systems. Professor Rabaey emphasized several interesting themes in the course of his talk.
Foremost among these is the fact that modern wireless applications are becoming increasingly demanding of processors. Perhaps this is best exemplified by the increased channel coding
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Because DSPs are typically assigned MAC-intensive tasks, one might assume that DSP performance is directly related to MAC throughput. In fact, vendors often advertise the speed of their DSPs in terms of MMACS (millions of multiply-accumulates per second). However, BDTI benchmark studies reveal that MAC throughput is not a reliable indicator of real-world DSP performance.
One reason for this is that digital signal processing involves more than just MACs; e.g., Viterbi decoding—an
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The embedded DSP group of Philips Semiconductors and design house Frontier Design merged last month to form a new company, Adelante Technologies. Philips will initially be the majority owner of Adelante, but Philips plans to reduce its ownership below 50% as other companies join the partnership. Adelante will integrate Philips' 32-bit REAL (Reconfigurable Embedded DSP Architecture Low cost/Low power) DSP core with Frontier's tools and applications knowledge; the result will be a licensable
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According to a recently revised market forecast by Forward Concepts (http://fwdconcepts.com), total DSP processor revenues will drop this year for the first time in the industry's 21-year history. An earlier forecast had called for a depressed 10% growth in 2001 (down from 30% growth in 2000), but this estimate has been scaled back significantly—the new projection is for a precipitous 25% drop.
Many of the industry's key players are showing a corresponding drop in revenues. TI is projecting
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Analog Devices (ADI) announced this month the first device based on the Micro Signal Architecture (MSA), a new 16-bit fixed-point DSP architecture jointly developed by ADI and Intel. The ADSP-21535, the first in ADI's new "Blackfin" family, joins an already competitive field of low-power, moderate-performance architectures that target portable communications applications. Several attributes of the MSA, however, might well distinguish it from the rest of this pack, which includes the TI 'C55xx
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Three new DSP architectures were presented at the Embedded Processor Forum in San Jose last month. All three architectures are heterogeneous, i.e., they each combine a DSP with other performance enhancing hardware. All three architectures also target communications applications.
It is already common in communications applications to find boards that combine DSPs, general-purpose processors, reconfigurable logic, and ASICs, albeit with each on a separate chip. As the potential for
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Business guru Michael Porter once observed that the U.S. railroads failed because they took too narrow a view of their business. They thought their business was just the railroads—in fact it was transportation.
DSP processor vendors are now at the crossroads of what could be a similar situation. If they take the narrow view that their business is just DSPs, they might go the way of the U.S. rail system. On the other hand, if they see themselves as DSP applications solution providers— where
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Analog Devices recently announced the ADSP-2191, the first single-core member of its ADSP-219x family. According to ADI, the '2191 will operate at 160 MHz at 2.5 volts. The 16-bit '2191 targets telecommunications applications with a DMA controller, an 8- or 16- bit host port interface, three synchronous serial ports, two serial peripheral interfaces, and one UART. Along with the chip itself ADI will offer a suite of communications algorithms that are optimized for the '2191. Chips are
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