Intrinsity, a startup in Austin, Texas, recently disclosed its new Fast14 technology—a collection of design techniques that enable high-speed dynamic logic to be implemented on standard CMOS processes. This technology will facilitate clock speeds of up to 2.2 GHz. Intrinsity plans to apply this new technology to developing its own high-end embedded processors, which most likely will target the wired and wireless communications infrastructure markets.
Fast14 Technology achieves its speed increases in four ways. First, it uses a four-phase uniform overlapping clocking scheme that eliminates the need for latches. This unique clocking approach addresses the problem of race conditions typically associated with dynamic logic. Second, "1-of-N Dynamic Logic" (NDL) reduces the number of gate delays required to implement a logic function. Third, "Wire Twizzling"—a patented method for routing NDL signals—reduces coupling noise and improves signal speed with no area penalty, according to Intrinsity. Finally, an EDA tools suite automates the creation of dynamic logic circuits.
Intrinsity has already achieved speeds of 2.2 GHz on a 0.18-micron CMOS process with aluminum interconnections, but this was only a test chip with limited functionality. Moreover, chips produced with Fast14 technology have thus far consumed power commensurate with their increased speeds. Lower power consumption will likely be a crucial factor in Fast14's success, as even line-powered communications infrastructure applications are sensitive to power consumption due to heat-dissipation concerns.
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