Communication

Synopsys Enhances ARC Processor Core With Superscalar, DSP Capabilities

By adding a second front-end instruction decoder to the ARC HS3x high-end 32-bit RISC architecture, along with doubling the number of ALUs, Synopsys has created its latest ARC HS4x processor IP core family (Figure 1). The estimated performance increase over an ARC HS3x predecessor at the same clock speed can be as high as 40%, according to the company, with only modest die size and power consumption impacts. And via the inclusion of DSP enhancements akin to those initially launched with the mid Read more...

CEVA's XC12 DSP Core Targets Multi-Gbit Cellular, Wi-Fi Opportunities

At last month's MWC (Mobile World Congress), CEVA unveiled the XC12, its latest DSP core for communication infrastructure applications. A significant feature set upgrade to the XC4500 DSP core precursor, the XC12 is tailored for the bandwidth, latency and user count demands of next-generation "5G" cellular-supportive infrastructure equipment, ranging from remote digital front-end radio heads through multi-mode baseband processing in various-sized base stations, and all the way to wireless Read more...

CEVA-X1 DSP Core Targets Cellular IoT Opportunities

In March, InsideDSP covered the CEVA-X4, the first member of the company's cellular DSP core family based on its CEVA-X architecture framework, and focused on smartphones and tablets that support gigabit-per-second LTE-Advanced and LTE-A Pro protocols. In June, the company introduced the CEVA-X2, with half the scalar units of its bigger sibling (two versus four), and targeting wearables and other devices that harness 10 Mbps LTE-Cat 1 (formerly known as LTE-M Category 1). And now the company Read more...

Vayyar Aspires to Deliver Compact, Cost-Effective, Versatile Depth Scanning

A variety of visible light- and infrared-based technologies are currently available for determining objects' locations in 3D space, as well as ascertaining their surface shapes and movements. However, these approaches sometimes come with privacy concerns; they also are unable to see inside or through an object. And approaches to seeing inside or through an object, such as conventional and backscatter x-ray systems, along with the millimeter wave scanners now in use in U.S. airports, are Read more...

CEVA-X Processor Cores Tout DSP, Control Plane Balance for Wireless

CEVA's DSP cores have long been a fixture in many mobile phone cellular modems, where they handle the tranceiver's digital signal processing functions, working alongside function-specific hardware accelerators. However, the physical layer coordination between the transmit and receiver subsystems, along with overall modem control and other housekeeping tasks, has long been the bailiwick of a real-time CPU core from ARM, Imagination Technologies or another supplier. CEVA aspires to evolve this Read more...

New CEVA DSP Cores Eye Expanded LTE Usage

Hear the words "high volume DSP market" and you might automatically think of "mobile phones". And you'd be right; recent estimates peg quarterly worldwide mobile phone shipments approaching half a trillion units, with smartphones (which often contain multiple DSP cores) representing three-quarters of that amount. However, CEVA believes that in the not-too-distant future, alternative markets with similar cellular connectivity needs—wearables, connected vehicles, and a diversity of IoT devices— Read more...

Cadence's Tensilica Fusion: DSP for the IoT

The "Internet of Things" (IoT), one of the hottest topics in technology today, is widely anticipated to be a notable driver of both semiconductor and software demand in coming years. Key to an understanding of the IoT opportunity, as a recent article published on the Embedded Vision Alliance website notes, is its machine-to-machine aspect. Content generated at the source end of the IoT communication link is created by devices using various sensor technologies, which are forecast to experience Read more...

EZchip Gets Up in ARMs

Massively parallel processor supplier Tilera is a company that InsideDSP has kept an eye on for nearly a decade now, stretching back to BDTI's benchmarking of the company's first-generation TILE architecture in its 64-core form (see sidebar "Company, Architecture and Product Line Background"). After an initial flurry of product releases, privately held Tilera grew uncharacteristically quiet over the next half-decade, focusing on rolling out the remainder of the TILE-Gx family, conserving its Read more...

CEVA's XC-4500 DSP: Symmetric Multi-Processing Capabilities Are Now Key

The title of the press release for CEVA's latest XC-4500 communications DSP core, introduced in mid-October, claims that it's the "World's First Vector Floating-Point DSP for Wireless Infrastructure Solutions." Those of you with good memories might be confused at this point, in thinking back to InsideDSP's February 2012 coverage of CEVA's prior-generation XC-4000 family. To clarify, although the earlier XC-4400 and XC-4410 also offered IEEE 754-compliant floating-point support, it was not Read more...

The Cellular Base Station: ASOCS Asserts that C-RAN is a Superior Implementation

The cellular base station and its associated infrastructure topology have remained largely unchanged throughout the industry's history to date, although upgrades have periodically occurred to address the needs of evolving voice and data standards. Within each base station are beefy application-tailored, highly integrated DSPs from companies such as CEVA, Freescale, LSI, and Texas Instruments, all of which are regularly covered in InsideDSP. A beefy “backhaul” tether connects each base station Read more...