Processors

ADI Ships 300 MHz TigerSHARC

On December 16th Analog Devices announced a new member of its high-performance fixed-/floating-point TigerSHARC family, the ADSP-TS101S. The chip runs at 300 MHz in a 0.13-micron process and is already in full production at this speed, according to ADI. The ADSP-TS101S is intended for high-performance multiprocessor applications, including telecommunications infrastructure, medical imaging, industrial instrumentation, and military electronics. BDTI has not yet benchmarked TigerSHARC, but Read more...

Jeff Bier’s Impulse Response—Processor Designers’ Sad, Sad World

Stroll the halls of any computer engineering graduate school and you will doubtless encounter numerous students brimming with ideas for cranking up processor speeds. Until recently, graduates of these schools found a warm welcome in the PC processor market, which seemed to have an insatiable need for speed. Today, however, fewer and fewer PC buyers are willing to pay a premium for more speed—after all, who needs a 3 GHz processor to write a letter to Grandma? If the PC market no longer needs Read more...

Intrinsity’s 2 GHz Processor Begins Sampling

In April Intrinsity announced general sampling of the 1.5 and 2 GHz versions of its FastMIPS and FastMATH processors. Both processors are based on the MIPS32 architecture; the FastMATH processor adds a matrix math engine to the baseline architecture. The combination of high clock speed and matrix-processing capabilities give the Intrinsity FastMATH processor impressive signal-processing speed on algorithms with ample opportunity for parallel processing. On BDTI’s Complex Block FIR Filter Read more...

PXA250-based PDA Performance Problems Probed

Intel’s PXA2xx processor family is making significant headway in the high-end PDA market. Last month, for example, Sony began shipping the first Palm OS-based PDA powered by a PXA2xx. Although the PXA2xx has gained wide acceptance in high-end PDAs, some reviewers (for example, at CNET.com) have complained that PXA2xx-based PDAs are not appreciably faster than PDAs based on its predecessor, StrongARM. Some reviewers have been particularly critical of the lack of improvement on multimedia Read more...

BOPS Quietly Calls it Quits

BOPS, Inc. quietly began auctioning off its patent portfolio last month, signaling the end of its operations as a vendor of high performance licensable DSP cores. Given the current business climate, the failure of another licensable core vendor is hardly surprising. (For more examples, see our story on Lexra.)  However, BOPS had a few things working against it beyond the industry slow-down. The BOPS architecture was based on a complicated, scalable array of powerful processing elements. At Read more...

Embedded DRAM Comes of Age

Several vendors recently unveiled embedded processors containing large amounts of on-chip RAM—but not the SRAM usually found in embedded processor chips. Instead, these new processors integrate copious quantities of on-chip DRAM. Embedding DRAM with processing logic can greatly improve on-chip memory bandwidth by providing access to the wide internal bus structures present in DRAM. Combining embedded DRAM (eDRAM) with processing logic also creates an opportunity to choose between cost and Read more...

Wireless MMX: A Look Under The Hood

Last month Intel announced its “Wireless MMX” extensions for its ARM-based XScale architecture. Wireless MMX includes functionality equivalent to the integer components of the x86 MMX and SSE instruction sets. Like its x86 counterparts, Wireless MMX uses single-instruction multiple-data (SIMD) techniques to perform eight 8-bit, four 16-bit, two 32-bit, or (in a few cases) one 64-bit operation with a single instruction. Although the x86 and XScale implementations of MMX provide equivalent Read more...

DSP Group Announces One-Size-Fits-All Core

In August, DSP Group announced CedarDSPCore, a family of licensable DSP cores that targets a wide range of applications. The CedarDSPCore family has two unusual features that lend it noteworthy flexibility. First, these cores use “computation clusters” rather than a traditional data path. Each “cluster” contains two multiply-accumulate units, an ALU, a shifter, and a register file. Licensees can choose from cores with one, two, or four clusters, depending on the performance requirements of Read more...

Notes From the TI Developer Conference

At last month's TI Developer Conference, TI convened a panel discussion featuring some of its top management. This panel addressed a broad range of topics such as TI's plans for its architectures and the changing competitive landscape. One of the most interesting topics discussed was the growing competition between Intel and TI. Intel has made no secret of its intent to wrest the market for handheld wireless devices from TI. Although TI holds the lead in cell phones, Intel has established Read more...

DSP Group Steps Up to New Platform

Last month the IP licensing division of DSP Group introduced its first platform offering, XpertTeak. The fully synthesizable XpertTeak platform consists of the dual-MAC TeakDSPCore core, data and program memory, and peripherals like timers, buffered serial ports, and a DMA controller. This platform strikes a middle ground between DSP Group's existing offerings of stand-alone DSP cores and application-specific combinations of DSP cores, software, memory, and peripherals. In another first for Read more...