Xilinx recently unveiled a new chip architecture integrating an ARM processor with an FPGA fabric. This platform centers around a dual-core ARM Cortex-A9 processor complex, including hardened memory interfaces and peripherals. The platform architecture, shown in Figure 1, is intended to behave like a CPU first and an FPGA second. Specifically, the CPU will boot independently—without requiring that the FPGA first be configured. Xilinx is targeting markets that require both complex software
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Analog Devices, Inc (ADI) has announced new members of its floating-point SHARC processor family featuring lower prices and offering LQFP packages, which are easier to use in older, lower-cost manufacturing facilities. The new SHARC products target digital audio, industrial, automotive, and medical markets. New ADSP-2147x chips feature lower power than previous SHARC products, while ADSP-2148x parts feature high performance with greater integration.
These parts include on-chip memory of up to
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This month NXP has unveiled more details on its new licensable core, the CoolFlux BSP, which targets low-power communications baseband processing. The core is based on the similarly named CoolFlux DSP, which was designed for use in low-power audio applications and introduced in 2004. Relative to the older core, NXP says that the CoolFlux BSP has been enhanced to increase its performance in baseband processing while retaining a small footprint and low power.
According to NXP, the CoolFlux
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In July, Texas Instruments announced that it will offer new low-power variants of four of its key DSP processor product lines: the ’C55x, the ’C64x+, the ’C67x, and OMAP. The new family members are intended to span a wide range of low-power applications, from those that are line-powered but require low heat dissipation (such as home entertainment gear, where cooling fans are considered too noisy) to those that require a week or more of battery life (such as portable medical monitoring devices
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This month Texas Instruments launched the DM355, the latest chip in its “DaVinci” family. The DM355 supports high-definition MPEG‑4 video encoding and decoding (but not both simultaneously) and is intended for low-cost imaging and video applications such as digital still cameras, IP video cameras, digital photo frames and video baby monitors.
Unlike other DaVinci chips, the DM355 does not include a ‘C64x+ DSP core. Instead, a specialized coprocessor handles MPEG‑4 and JPEG processing. Like
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Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1. (The middle of the family range is filled out by the AV 404V, AV 406V, and AV 407V) are intended for compression-centric applications such as camera phones, portable media players,
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In June Atmel announced the Customizable Atmel Processor (CAP), a family of customizable microcontrollers, and two initial devices. Customization in the CAP is achieved via a gate array block in which users can implement functions ranging from processor cores and peripherals to algorithm accelerators. Atmel intends the CAP devices to be used in industrial, consumer, medical, and automotive applications, as replacements for the microcontroller-FPGA combinations often used in these applications
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Note: This article has been changed on 7/18/2007 from its original version.
On May 31, CEVA Inc. announced CEVA-TeakLite‑III, a new family of DSP cores. The TeakLite‑III cores build upon CEVA’s earlier TeakLite cores, CEVA-TeakLite and CEVA-TeakLite-II, with which the TeakLite‑III is backwards compatible. To meet the precision and throughput demands of its intended applications, which include high-end audio, 3G cellular, VoIP, and portable audio players, the TeakLite‑III features support
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In March CEVA unveiled “Mobile-Media-Lite” (MMLite), a family of multimedia processing solutions comprising licensable silicon IP and software. The family is aimed at low-end multimedia-enabled devices such as mobile TV players, portable multimedia players, and multimedia phones. CEVA also announced the first family member, the MM2200, a single-processor multimedia engine. CEVA’s intent is to provide highly integrated, application-optimized solutions; the company states that the MM2200 is
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In recent years, FPGA vendors have been aggressively pursuing high-performance signal processing applications. This month Xilinx broadened its target DSP markets by announcing a new lower-cost DSP-oriented FPGA family, Spartan-3A DSP. Spartan-3A DSP FPGAs are intended to provide better DSP performance than other Spartan devices while being less expensive than Xilinx’s high-performance Virtex-4 and Virtex-5 families. The new chip family targets cost-sensitive applications with high computational
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