Low-Power

Microchip Technologies' dsPICs: DSP-Capable MCUs Receive Generational Upticks

In reading the InsideDSP newsletter every month, one observation that I hope you've made is that a diversity of processing options exist for implementing digital signal processing algorithms. The alternatives include GPUs, FPGAs, conventional CPUs, and standalone DSPs, along with DSP cores embedded alongside CPUs and other function blocks in highly integrated SoCs. And in recent years, you can also add microcontrollers (MCUs) to the list; while they don't typically include a standalone embedded Read more...

Adapteva's Epiphany Floating Point Processor Core: A Leading-Edge Lithography May Finally Open Doors

Cost- and power consumption-sensitive digital signal processing applications tend to leverage fixed point processors, for a common fundamental reason: fixed-point processor cores are substantially less complex than their floating-point counterparts, leading to reductions in transistor count and silicon area. Yet fixed-point processing comes with trade-offs of its own; code development, for example, is complicated by the need to comprehend the potential for overflow, underflow and round-off Read more...

Spansion's Speech Recognition Coprocessor: Flash Memory with On-Board Search-Logic Power

Spansion is a name that's probably familiar to many of you, as a supplier of nonvolatile memories. You might be wondering, therefore, what the company's doing gracing the pages of InsideDSP. Well, hold that thought! Spansion was originally founded in 1993 as a joint venture of AMD and Fujitsu, and named FASL (Fujitsu AMD Semiconductor Limited). AMD took over full control of FASL in 2003, renamed it Spansion LLC in 2004 and spun it out as a standalone corporate entity at the end of 2005. Read more...

QDSP6 V4: Qualcomm Gives Customers and Developers Programming Access to its DSP Core

"There's been at least one DSP core in every chip that Qualcomm's ever made." Qualcomm senior director of product management Rick Maule used this statement as his lead-in to an explanation of the latest-generation QDSP6 architecture, specifically where it fits in the company lengthy DSP development heritage. QDSP6, if you haven't already figured out, refers to Qualcomm's sixth-generation DSP core architecture and is also commonly referred to by its "Hexagon" marketing moniker. The sixth- Read more...

Analog Devices' Latest Blackfin Proliferations Get Embedded Vision Religion

It's a safe bet that when a chip company devotes precious development time and manpower, not to mention silicon area, to a specialized function, that company feels confident that it's going to get a notably positive return on its investment. Take Intel, for example, which embeds a video processing block called Quick Sync in its Sandy Bridge and successor Ivy Bridge processors, in striving to maximize performance and minimize power consumption versus host CPU- or integrated GPU-based video Read more...

CEVA's TeakLite-4: Audio Once Again Comes to the Fore

"If it's not broken, don't fix it." That well-known maxim seemed for many years to encapsulate CEVA's approach to audio DSP cores, given that the company's third-generation offering in this particular application space (and first-generation 32-bit core), the TeakLite-III, dates from 2007. However, after both fortifying its foundation communications DSP offerings ("CEVA's XC4000 DSP Core: The Communications Focus Expands Even More") and moving into the emerging embedded vision space ("The CEVA Read more...

Medfield: Will Intel's Long-Standing x86-in-Smartphone Aspirations Finally be Fulfilled?

Intel has been striving to shoehorn the x86 CPU architecture into handheld communications and computing devices ever since the company began publicly discussing the Atom architecture in late 2007. First- and second-generation Atom-based CPUs and associated core logic chipsets found predominant success in netbooks. But Intel also targeted low-voltage and reduced-clock-speed variants (in some cases also swapping out internally developed graphics accelerators for PowerVR cores licensed from Read more...

Picochip and Mindspeed: Former Competitors Unite to Address Wireless Spectrum Needs

The dearth of available wireless spectrum throughout the world, notably in the United States, is one of technology's hottest topics. It's driving network management policies such as bandwidth throttling, data usage caps, and blocks of particular ports, protocols and services, any or all of which (depending on which side of the debate you're on) are overdue and necessary, or overly heavy-handed and fiscally motivated. It's prompting the FCC to prod terrestrial television broadcasters into Read more...

CEVA's XC4000 DSP Core: The Communications Focus Expands Even More

Technology advances ever onward over time, and in fact its pace has accelerated since Jack Kilby's initial integrated circuit demonstration in 1958. So it is that, while CEVA's DSP core licensees are demonstrating SoCs based on the company's current-generation CEVA-XC323 (see "Picochip and Mindspeed: Former Competitors Unite to Address Wireless Spectrum Needs" in this issue of InsideDSP), CEVA is simultaneously unveiling its next-generation core, the XC4000 (Figure 1). Figure 1. CEVA builds Read more...

ARM's Cortex-A7 and A15: A Performance Versus Power Consumption Optimization Scheme

Last month's edition of InsideDSP included the article "NVIDIA and Qualcomm ARM Up Against Competitors," which discussed (among other things) NVIDIA's upcoming five-core Kal-El (i.e. Tegra 3) SoC. Tegra 3 combines four ARM Cortex-A9 cores built out of conventional 40 nm transistors and a fifth Cortex-A9 constructed from low-leakage (albeit switching speed-limited) circuits. The fifth core will operate stand-alone in low-performance usage scenarios (including, ironically, during high definition Read more...