Xilinx Spartan gets DSP

In recent years, FPGA vendors have been aggressively pursuing high-performance signal processing applications. This month Xilinx broadened its target DSP markets by announcing a new lower-cost DSP-oriented FPGA family, Spartan-3A DSP. Spartan-3A DSP FPGAs are intended to provide better DSP performance than other Spartan devices while being less expensive than Xilinx’s high-performance Virtex-4 and Virtex-5 families. The new chip family targets cost-sensitive applications with high computational demands, such as video, wireless, and consumer applications; Xilinx envisions that Spartan-3A DSP chips will often find use as co-processors, typically running alongside a DSP processor. The new chips will be fabricated in a 90 nm process.

Spartan-3A DSPs are based on the Spartan-3A family, but have a number of enhancements. Spartan-3A DSP chips have double the block RAM (“BRAM”) memory of other Spartan devices and, like the Virtex-4 and Virtex-5 families, the new chips incorporate hardwired DSP data paths. In the Spartan-3A DSP family these data paths are called “DSP48A slices,” and they are similar (but not identical) to the DSP48 slices in Virtex-4 chips. Each DSP48A slice contains an 18x18 multiplier and two-input adder, among other features. Unlike Virtex-4 slices, Spartan-3A DSP slices include a pre-adder intended for use in FIR filtering. In Virtex-4 chips, if a pre-adder is needed it must be implemented in the programmable logic fabric.

Initially there will be two chips in the Spartan-3A DSP family: the less-expensive 3SD1800A and the higher-capacity 3SD3400A. These chips will be priced at $30 and $45 (respectively) in 25K quantities. Although Spartan-3A DSP chips are expected to be in full production by the third quarter of 2007, the prices quoted by Xilinx are projected for late 2008.   Table 1 presents selected chip data for Spartan-3A DSPs compared to a low-cost Virtex-4 chip (Virtex pricing taken from FPGAs for DSP, Second Edition).
 

Table 1: Selected Spartan-3A DSP and Virtex-4 chip characteristics, for the lowest speed grades.

Spartan-3A DSP is marketed as Xilinx’s low-cost DSP-oriented FPGA family, but it’s difficult to make cost or cost-performance comparisons between the Spartan-3A DSP family and other Xilinx devices because Xilinx has declined to release apples-to-apples pricing data. Clearly,  the Virtex-4 SX25 25 KU price in 2008 is likely to be considerably lower than the 1 KU price for 2006 shown above.

Based on a simple comparison of DSP slice MAC (multiply-accumulate) throughput and BDTI’s projection of 4Q08 25 KU Virtex-4 SX25 pricing; we expect that the Spartan-3A DSP chips will deliver significantly less performance per dollar on DSP tasks compared to low-cost Virtex-4 chips. In absolute terms, however, we expect that Spartan-3A DSP chips will be less expensive than low-end Virtex-4 devices, and thus the new family may open up new application areas for DSP-enhanced FPGAs. In any case, use caution in comparing Spartan-3A DSP prices with current pricing for other chips; by the time Spartan-3A DSPs are available at the quoted price, prices of other chips will probably have come down.

When quoting Spartan-3A DSP performance, Xilinx calculates GMACS (billions of multiply-accumulate operations per second) by multiplying the number of hardwired multipliers per device by the maximum clock speed of the DSP slices. In practice, however, typical applications are unlikely to achieve this speed and will usually operate at speeds of around 70% or less of the maximum. 

On the other hand, using the DSP slices isn’t the only way to implement MACs – additional MAC throughput can be achieved using the FPGA’s programmable logic resources and distributed arithmetic.  Using this approach you could conceivably achieve higher MAC throughput than the figures cited by Xilinx.  Either way, the Spartan-3A DSP can deliver many more MACs per second than typical high-performance DSP processors, which top out at around 8 GMACS and typically cost $200 and up for the fastest speed grade in 1K quantities. (We should note that comparing raw MACs/second is not a particularly accurate way to gauge DSP performance, for several reasons.  For example, while MACs are common in some DSP algorithms (such as filters and FFTs), other DSP algorithms (such as Viterbi decoding) don’t use MACs at all.)

Spartan-3A DSP engineering samples are available now (sample pricing has not been disclosed), along with a Spartan-3A DSP-based development board.