On July 5th ASIC design house VeriSilicon Holdings Co. announced its acquisition of the ZSP digital signal processor core business from LSI Logic for $13 million in cash and stock (LSI originally acquired the ZSP unit in 1999 for $11.3 million) The acquisition includes cores, development tools, ASSPs, software, and associated patents. VeriSilicon will retain most of the ZSP R&D team and continue developing a roadmap for additional core products.
Figure 1. Simplified ZSP600
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On June 26th Texas Instruments announced the TAS3108, a new 8-channel audio processor targeting high fidelity home and car audio. The TAS3108's predecessor was a fixed-function filter engine. Customers would specify the filter properties and receive a customized fixed-function chip. With the TAS3108, TI has made the chip programmable and allowed customers the ability to implement their own filtering algorithms.
The TAS3108 contains a relatively simple fixed-point DSP core running at 135 MHz
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Companies that focus on DSP algorithm development are often at the cutting edge, delivering the ideas that drive new technologies. For example, innovative compression, communications, and recognition algorithms have enabled numerous new products in recent years. Unfortunately, it takes more than a great algorithm to be successful. An algorithm is only as good as its implementation. Without a well optimized implementation, even the best algorithm risks extinction in the marketplace.
To
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When does 1 GHz + 1 GHz + 1 GHz + 1 GHz not necessarily equal 4 GHz? When you’re calculating the performance potential of a multi-core chip.
Freescale recently introduced a new DSP chip, the MSC8144, that contains four 1 GHz SC3400 processor cores. Freescale characterizes the new chip as being “performance-equivalent” to one 4 GHz core. But is it really? As usual, the answer is, “It depends.” It depends on what kind of application you’re running, how you map the application onto the
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Say you’ve just developed a new digital signal processing algorithm—a new audio or video codec, for example. The algorithm is intended to be ported to multiple embedded processors, including general-purpose processors (like the ARM9) and digital signal processors (like the Texas Instruments TMS320C55x). Porting an algorithm to an embedded processor is a lot of work, but many of the steps involved are the same regardless of the target processor. Therefore, it makes sense to create a version of
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In May, Texas Instruments disclosed its first implementation of the ARM Cortex-A8 processor. Started in 2003 and reportedly involving a team of forty-five engineers in TI’s wireless handset chip unit, the implementation represents a massive effort considering the Cortex-A8 is just one element of the complex SoCs designed by TI for cell phones. Typically, ARM cores are implemented using logic synthesis exclusively. For the Cortex-A8, TI instead took the very labor-intensive path of hand
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The next time you’re choosing an embedded processor, you should consider choosing an FPGA. This was the take-home message from FPGA vendors at the Embedded Systems Conference Silicon Valley in April—and in my opinion, it’s a message with merit.
Although FPGAs aren’t widely used as embedded processors today, there are some compelling advantages to doing so. In the embedded world, processor selection is often made on the basis of which chip offers the best combination of on-chip peripherals
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Benchmarks are used by processor vendors for a variety of purposes. They are used internally for competitive analysis and new product development. Externally they are used in presentations, articles, and marketing materials to credibly demonstrate the advantages of a processor. In fact, sophisticated processor users increasing demand independently verified benchmark for use in their processor selection analyses. Given the importance placed on benchmarks, processor vendors are well advised
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Every so often I get a call from someone who wants to know the gate count (or equivalently, the silicon area) of some embedded processor core. And every time this happens, I have to stifle the urge to say “Why on earth do you care?”
The reason the question baffles me is that, in chips that use embedded processor cores, the area used by the core is almost always negligible compared to the area eaten up by memory banks. It’s common for the processor core to consume only about 10% of the die
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On May 15, Xilinx, Inc. unveiled its new Virtex-5 line of field programmable gate arrays (FPGAs). The product line will consist of four distinct families, each targeting a specific class of applications. While all four families share the same basic architecture, each will have a different mixture of hard-wired blocks and I/O features geared for its targeted applications. The three currently sampling devices are from the LX family and target high-speed logic applications. The remaining three
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