Tools

CEVA's Multimedia DSP Cores: A Framework for Accessing Them, and a New MM3101 Imaging Algorithm

In January 2013, InsideDSP covered the CEVA-MM3101, the company's first DSP core targeted not only at still and video image encoding and decoding tasks (akin to the prior-generation MM2000 and MM3000) but also at a variety of image and vision processing tasks. At that time, the company published the following table of MM3101 functions that it provides to its licensees (Table 1): Table 1. The initial extensive software function library unveiled in conjunction with the CEVA-MM3101 introduction Read more...

The Cellular Base Station: ASOCS Asserts that C-RAN is a Superior Implementation

The cellular base station and its associated infrastructure topology have remained largely unchanged throughout the industry's history to date, although upgrades have periodically occurred to address the needs of evolving voice and data standards. Within each base station are beefy application-tailored, highly integrated DSPs from companies such as CEVA, Freescale, LSI, and Texas Instruments, all of which are regularly covered in InsideDSP. A beefy “backhaul” tether connects each base station Read more...

Case Study: Optimizing Evaluation Board Design Decisions

BDTI is well known for its software-related capabilities: performance- and power consumption-related benchmarking, for example, along with algorithm evaluation, and development and optimization work. But the company is no stranger to hardware, either. Take, for example, its recent testing of DSP functions implemented in Altera FPGAs, or its successful effort to quantify the power draw of audio processing algorithms running on tablet computers. Or take this month's case study, which stems from a Read more...

BDTI Evaluates Floating-Point DSP Performance and Energy Efficiency of Altera 28 nm FPGAs

Back in September 2011, an InsideDSP article described a just-published analysis conducted by BDTI and sponsored by Altera, evaluating the viability of implementing complex hardware-accelerated single-precision floating-point functions on FPGA fabric. As I wrote then: To date, FPGAs have been used almost exclusively for fixed-point digital signal processing functions. Although FPGA vendors have long offered floating-point primitive libraries, the performance of FPGAs in floating-point Read more...

Tensilica's IVP: The Vision Processing Core Market Gets Another Entry

In a recent interview in EE Times, BDTI co-founder and president Jeff Bier commented: Multi-core CPUs are very powerful and programmable, but not very energy-efficient.  So if you have a battery-powered device that is going to be doing a lot of vision processing, you may be motivated to run your vision algorithms on a more specialized processor. Bier could have been speaking about CEVA's MM3101 processing core, which InsideDSP covered in its January 2012 edition. Or he could have been referring Read more...

Altera's OpenCL SDK: High-Level Synthesis Done A Different Way

Within a technical article published in the August 2012 edition of InsideDSP, I wrote: As FPGAs have evolved, the means by which engineers create FPGA designs have also evolved. In particular, design techniques employing increasingly higher levels of abstraction have been required to address the increasing chip capabilities. Initial FPGA design flows were schematic-based. These later gave way to HDLs (hardware description languages) such as VHDL and Verilog. And more recently, high-level Read more...

Microchip Technology's GestIC: An E-Field Based Competitor (or Companion) to Camera-Based Gesture Technology

Touch-free gesture interfaces are increasingly entering the public consciousness, spurred on by trendsetting popular implementations such as Microsoft's Kinect. And, as Tom Cruise's portrayal of Chief John Anderton in the future-forecasting film Minority Report suggests, they're equally compelling beyond the game console. Camera (i.e. image sensor)-based gesture interface implementations may be most common nowadays, but they're not the only feasible approach. Several weeks ago, for example, Read more...

Case Study: Digital Signal Processing Library Development Enables Effective Customer Deployments

The prodigious transistor budgets delivered by modern semiconductor processes enable designers to create powerful processor cores and chips. However, this silicon potential will be for naught if it can't easily be harnessed by algorithm developers. Consider the non-trivial die area and development time consumed by a processor core, along with the notable competitive differentiation that can be accrued by its effective utilization. Clearly, the ease by which coders can gain robust access to Read more...

CrossCore Embedded Studio: Analog Devices Gives Eclipse a Go

Analog Devices becomes the latest semiconductor manufacturer to standardize on the increasingly pervasive Eclipse open-source IDE (integrated development environment) and extensible plug-in system with the CrossCore Embedded Studio software suite for C++ and assembly language-based software development, which the company officially unveiled last month at the DESIGN East conference. Particularly attentive readers may recall that this isn't the first time we've heard about CCES (CrossCore Read more...

Adapteva's Epiphany Floating Point Processor Core: A Leading-Edge Lithography May Finally Open Doors

Cost- and power consumption-sensitive digital signal processing applications tend to leverage fixed point processors, for a common fundamental reason: fixed-point processor cores are substantially less complex than their floating-point counterparts, leading to reductions in transistor count and silicon area. Yet fixed-point processing comes with trade-offs of its own; code development, for example, is complicated by the need to comprehend the potential for overflow, underflow and round-off Read more...