Tools

Texas Instruments’ Graphical Programming Tool Generates Prototyping Code

Texas Instruments (TI) recently introduced C6EZFlo, a graphical programming tool for its C6000 and DaVinci DSP families.  C6EZFlo is a prototyping tool to help users quickly develop initial software implementations of their applications.  In particular, C6EZFlo is designed to help programmers develop initialization, configuration, and framework code for their applications.  C6EZFlo generates C code and project files intended to be loaded into TI’s C language Code Composer Studio tool suite Read more...

ARM Introduces Cortex-M4 Core for Digital Signal Controllers

This spring, ARM added the Cortex-M4 digital signal controller (DSC) to its processor core line-up.  This product brings digital signal processing capabilities to ARM’s microcontroller core line (the Cortex-M family).  At the Embedded Systems Conference in San Jose in April, NXP demonstrated a prototype Cortex-M4-based chip running at approximately 150 MHz.  In June, Freescale announced its Kinetis line, also based on the Cortex-M4.  ST Micro and Texas Instruments have also announced their Read more...

Altera Announces Variable-Precision DSP Blocks in Stratix V FPGAs

Altera recently disclosed architecture details of its next generation Stratix V FPGA family.  The architecture features a variable-precision DSP block, designed to provide better resource utilization for algorithms requiring a variety of data widths.  Altera represents this approach via a variable precision “dial,” shown in Figure 1.  In addition to 18-bit by 18-bit (18×18) and 36×36 modes supported by previous blocks, the DSP block natively supports three 9×9 multiply operations or one 18×25 Read more...

Xilinx Unveils High-Performance ARM-based CPU-FPGA Hybrid Platform

Xilinx recently unveiled a new chip architecture integrating an ARM processor with an FPGA fabric. This platform centers around a dual-core ARM Cortex-A9 processor complex, including hardened memory interfaces and peripherals.  The platform architecture, shown in Figure 1, is intended to behave like a CPU first and an FPGA second.  Specifically, the CPU will boot independently—without requiring that the FPGA first be configured.  Xilinx is targeting markets that require both complex software Read more...

Case Study: Is Your Development Kit Ready for Customers?

Time-to-market pressures mean that system designers, software developers and hardware designers require more than just chips from their chip vendors. They demand reliable, easy-to-use software development tools, OS support, middleware and application software components, I/O support, and more—right out of the box. To win design-ins, a chip vendor must deliver much more than just processing performance on a board. Vendors are responding to this demand by packaging specialized boards, development Read more...

Synfora’s PICO High-Level Synthesis Tool Achieves BDTI Certification

BDTI recently completed an in-depth evaluation of Synfora’s PICO tool through the BDTI High-Level Synthesis Tool Certification Program™.  BDTI evaluated the process of implementing applications on a Xilinx FPGA using PICO, comparing it with traditional FPGA design based on hand-written RTL code, and with DSP processor software development.  PICO enabled creation of efficient FPGA implementations, with design productivity comparable to that of DSP processor software development.  The Read more...

AutoESL’s AutoPilot High-Level Synthesis Tool Achieves BDTI Certification

BDTI recently completed an in-depth analysis of AutoESL’s AutoPilot high-level synthesis tool via the BDTI High-Level Synthesis Tool Certification Program™. BDTI evaluated the process of implementing applications on a Xilinx FPGA using AutoPilot, comparing it with traditional FPGA design based on hand-written RTL code, and with DSP processor software development. Overall, AutoPilot demonstrated a strong ability to generate high-quality RTL code—with equivalent resource utilization to hand- Read more...

BDTI Unveils High-Level Synthesis Tools Certification Program Results

This week BDTI released the first results from its High-Level Synthesis Tools Certification Program (HLSTCP).  The first tools to achieve certification are AutoESL’s AutoPilot and Synfora’s PICO.  Additional certifications will be released on an ongoing basis, as agreements with tool vendors allow.  The HLSTCP helps engineers and managers understand the capabilities of high-level synthesis (HLS) tools and assess when to consider these tools for their designs.  HLS tool vendors can use the Read more...

CEVA Simplifies DSP Software Development

This month CEVA announced significant improvements to its software tool suite.  Collectively, the new tools and features are dubbed the CEVA Application Optimizer, and are part of the CEVA-Toolbox software development suite.  CEVA describes these capabilities as providing an “end-to-end, fully C-based development flow.”  This is an important topic for users of DSP processors, who are less and less willing to write heavily target-specific C code or assembly code which requires them to become Read more...

Jeff Bier’s Impulse Response: NVIDIA GPUs Turn Up the Heat

In October of 2007, I wrote a column called “When Worlds Collide,” which was about NVIDIA’s emerging strategy of offering “general-purpose GPUs.”  At the time, I thought it was interesting that NVIDIA had begun to move beyond graphics applications to target “high-performance computing” (HPC) applications like financial and seismic analysis, thus competing with processors outside of the GPU space. I also observed that the ubiquity of GPUs in PCs would likely help NVIDIA gain traction in non- Read more...