Processors

Jeff Bier’s Impulse Response—Creative Tools Key to DSP on MCUs

The beauty of digital signal processing is that it enables people to convert available processing power into cool new features, better performance, and lower power in their products. There are countless examples, including MP3 players, wireless communications of all kinds, medical imaging, and voice recognition. Microcontrollers historically haven’t had enough processing power to do much DSP, but that’s changing—today’s high-end microcontrollers offer DSP performance levels that were once Read more...

ARM Announces 2 GHz Dual-Core Cortex-A9

On September 21st ARM announced a new high-speed, hard macro implementation of the Cortex-A9 architecture, called “Osprey.”  (A hard macro is a physical implementation of an IP block in a specific process.) Osprey is a dual-core implementation of the Cortex-A9 and according to ARM, it will run at up to 2 GHz in a 40 nm (TSMC 40G) fabrication process.  Like other Cortex-A9 variants, Osprey includes a floating-point unit (FPU) and NEON SIMD signal processing unit for each core. ARM will offer Read more...

Intrinsity, Samsung Announce Cortex-A8 “Hummingbird”

This month Intrinsity and Samsung jointly announced a new, highly optimized implementation of the ARM Cortex-A8 CPU core, called “Hummingbird.” According to Samsung and Intrinsity, an initial Hummingbird sample has achieved 1 GHz in Samsung’s 45nm low-power process. The companies say that Hummingbird is both faster and lower power than other Cortex-A8 implementations, though as of this writing they have declined to provide power data. Samsung says that it is currently developing Hummingbird- Read more...

Tensilica Fills Out Portfolio with Dual-MAC DSP Core

This article has been modified from its original content.  The original article contained a reference to the performance of the CEVA X-1620 core on a compiled C language implementation of the AMR-NB vocoder; this reference has been removed.  These results were taken from a 2007 CEVA white paper.  CEVA states that the X-1620 core is no longer offered for license and has been superseded by the CEVA X-1622.  CEVA also states that the compiled-code performance results for the CEVA X-1622 on the AMR Read more...

MIPS Positioning to Catch Android Wave

MIPS recently announced that Android has been ported to the MIPS architecture, with the goal of enabling its use in a variety of consumer-oriented applications. Android is an open-source operating system plus middle-ware and applications, and is backed by Google. (Google acquired a small start-up called “Android” in 2005, and continued development of Android software.)  Android was originally developed for use in handsets and was released in open-source form in 2007 by the Open Handset Read more...

Tensilica ConnX BBE Combines SIMD, VLIW for Baseband Performance

Last month Tensilica unveiled the first member of its new “ConnX” family of licensable DSP cores, the ConnX Baseband Engine (BBE), which combines VLIW with SIMD to support a wide range of parallel operations. As part of the announcement, Tensilica has also rebranded two of its existing products: the Diamond 545CK core and Vectra DSP engine are now known as the ConnX 545CK and ConnX Vectra, respectively. Tensilica says it has a lead ConnX BBE customer that taped out a chip in June; the core Read more...

Jeff Bier’s Impulse Response—A Different Kind of Verification Crisis

It often surprises me how chip vendors will spend a huge amount of money (like, say, 50 million dollars) developing a chip without rigorously verifying that the chip includes all the necessary features for the target applications. For example, awhile back we had a processor vendor ask us to benchmark their new core. As is often the case, the vendor had already done their own evaluation of the chip’s performance, but wanted independent benchmark results to use in their marketing materials.   Read more...

New Details Emerge on NXP’s CoolFlux BSP Core

This month NXP has unveiled more details on its new licensable core, the CoolFlux BSP, which targets low-power communications baseband processing. The core is based on the similarly named CoolFlux DSP, which was designed for use in low-power audio applications and introduced in 2004. Relative to the older core, NXP says that the CoolFlux BSP has been enhanced to increase its performance in baseband processing while retaining a small footprint and low power. According to NXP, the CoolFlux Read more...

Microchip Offers High-Performance DSP Library for PIC32

This month Microchip announced a “high-performance” software library of common DSP functions for its 32-bit microcontroller family, the PIC32. This library replaces Microchip’s earlier DSP library for the PIC32, which was quietly released last October. The library includes 16- and 32-bit vector math routines, 16-bit filters, and 16- and 32-bit FFTs.  Library components are implemented as C-callable assembly and are free of charge; support for the new functions has been added to the MPLAB C Read more...

BDTI Releases Benchmark Results for Toshiba's Venezia Platform

BDTI recently completed a benchmark analysis of the Toshiba MeP “Media embedded Processor” core and “IVC2” SIMD coprocessor, both of which are used in Toshiba’s Venezia mobile multimedia platform. The MeP is a licensable core that is intended to be used as a building block in multi-core, multimedia-oriented SoCs, typically with multiple MeP cores on a chip.  Each MeP core can be customized with specialized instructions, co-processors, and memory sizes. The base MeP core is a single-issue Read more...