Technology advances ever onward over time, and in fact its pace has accelerated since Jack Kilby's initial integrated circuit demonstration in 1958. So it is that, while CEVA's DSP core licensees are demonstrating SoCs based on the company's current-generation CEVA-XC323 (see "Picochip and Mindspeed: Former Competitors Unite to Address Wireless Spectrum Needs" in this issue of InsideDSP), CEVA is simultaneously unveiling its next-generation core, the XC4000 (Figure 1).
Figure 1. CEVA builds
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In the digital audio world, the second half of the '90s and a notable portion of the '00s were dominated by the "codec wars." Kicked off by MP3, which emerged in mid-1994, the battle was soon joined by a host of competitors; industry-standard follow-on AAC, Microsoft-developed WMA, RealNetworks-championed RealAudio, open-source favorite Ogg Vorbis, etc. And, from a surround sound standpoint, Dolby Digital was dominant in the DVD era, with DTS ascendant on the Blu-ray successor.
Nowadays,
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As last summer's formation of the Embedded Vision Alliance suggests, the transition from computer-based intelligent image processing to more compact, cost-effective and energy-efficient embedded vision products is already well underway. CEVA, a company to date best known for its digital signal processing cores found in cellular baseband IC designs, hopes to harness this trend (and, in the process, expand its serviceable market footprint) with the CEVA-MM3101, its latest imaging-tailored
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Last week, Freescale announced that senior vice president Lisa Su would be leaving the company for other opportunities. Shortly thereafter, AMD announced that Su would be joining AMD effective the end of this year as senior vice president and general manager of global business units. [Editor’s Note: We don’t normally report on personnel changes in InsideDSP, preferring to focus on technology and products. We’re making an exception in this case, because this personnel move is likely to have
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Back in November 2010 at Electronica in Munich, Germany, Texas Instruments unveiled the TMS320C66x DSP family, then consisting of a quad-core communications SoC (the TMS320C6670) along with three pin-compatible conventional DSPs in two-, four- and eight-core variants (the TMS320C6672, TMS320C6674 and TMS320C6678), all based on the company's earlier-unveiled KeyStone architecture. At that same time, TI trumpeted its products' fixed- and floating-point performance results on the BDTI DSP Kernel
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Last month's edition of InsideDSP included the article "NVIDIA and Qualcomm ARM Up Against Competitors," which discussed (among other things) NVIDIA's upcoming five-core Kal-El (i.e. Tegra 3) SoC. Tegra 3 combines four ARM Cortex-A9 cores built out of conventional 40 nm transistors and a fifth Cortex-A9 constructed from low-leakage (albeit switching speed-limited) circuits. The fifth core will operate stand-alone in low-performance usage scenarios (including, ironically, during high definition
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NVIDIA and Qualcomm, two leading ARM licensees and SoC implementers for high volume consumer electronics systems, are now sampling their latest-generation mobile application processors. Both companies recently published documentation describing the unique design techniques and features of their SoCs.
A Tegra Quintuplet
NVIDIA's current in-production product line consists of two generations of Tegra-branded devices. The initial Tegra family is a series of single-core devices based on the
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Last month's announcement by Advanced Micro Devices that its "Bulldozer"-based Opteron microprocessors for servers had begun shipping to customers for revenue, followed by last week's release of first public benchmarks for Bulldozer-based AMD FX CPUs, capped off a year-long series of new CPU microarchitectures and devices for the company. Notably, the microarchitectures represent the first fresh offerings from AMD since 2007's K10 microarchitecture, which first appeared in "Barcelona" CPUs
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Analog Devices and Texas Instruments both recently unveiled cost-optimized DSPs within one day of each other. Perhaps the seeming near-synchronicity was an innocent fluke. Then again, perhaps one vendor got an inkling of the other's announcement plans and decided that a near-coincident introduction would be an appropriate response. The exact circumstances don't particularly matter; the longstanding highly charged competitive climate between the two companies is fiscally and otherwise beneficial
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Freescale's re-engagement with historical Power Architecture (previously known as PowerPC) CPU business segments, such as communications, industrial, medical, military, robotics, and surveillance systems, began in earnest at the June 2008 Freescale Technology Forum when the company unveiled its first QorIQ (pronounced "Core IQ") product families. Responding to longstanding market requests for multi-core offerings, which to date had been addressed by only a single member of the PowerQUICC III
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