FPGAs

BrainChip Leverages Software, Acceleration Hardware to Jumpstart Emerging Neural Network Approach

Convolutional neural networks (CNNs) may be the hot artificial intelligence (AI) technology of the moment, in no small part due to their compatibility for both training and inference functions with existing GPUs, FPGAs and DSPs as accelerators, but they're not the only game in town. Witness, for example, Australia-based startup BrainChip Holdings and its alternative proprietary spiking neural network (SNN) technology (Figure 1). Now armed with both foundation software and acceleration hardware Read more...

Xilinx's reVISION Stack Tackles Computer Vision, Machine Learning Applications

Xilinx, like many companies, sees a significant opportunity in burgeoning deep neural network applications, as well as those that leverage computer vision...often times, both at the same time. Last fall, targeting acceleration of cloud-based deep neural network inference (when a neural network analyzes new data it’s presented with, based on its previous training), the company unveiled its Reconfigurable Acceleration Stack, an application-tailored expansion of its original SDAccel development Read more...

Achronix Aspires to Make Embedded FPGA IP Mainstream

Programmable logic IP cores, intended for integration within a broader-function ASIC, are a long-discussed and –explored product option that has yet to achieve more than niche adoption. Small FPGA IP players such as Flex Logic Technologies and Menta linger in the market, but picking such a supplier for your next SoC can be a gamble; what happens if they get acquired or otherwise disappear? And big FPGA vendors like Altera (now Intel's Programmable Solutions Group) and Xilinx, along with medium- Read more...

Xilinx Previews New Chips and Tools for Heterogeneous Processing

Back in early 2010, Xilinx first began discussing its "Extensible Processing Platform" concept, followed by a formal introduction of the Zynq-7000 product family one year later (with initial sampling another year after that). Zynq-7000 wasn't the first processor-plus-programmable logic combo chip; both Xilinx and competitors like Altera had previously developed such devices. But at the time it was unique in that it embedded a full-fledged processor subsystem, including a full peripheral set, Read more...

With SDAccel, Xilinx Embraces OpenCL

Emerging and evolving options for high-level design of FPGAs is a topic of ongoing interest at InsideDSP. Recently, for example, BDTI covered the latest version of Calypto's Catapult C-based design environment. Similarly, in August 2012 InsideDSP discussed the C-based high-level synthesis (HLS) facilities that Xilinx bundled in some versions of its Vivado FPGA design toolset. And less than a year ago, BDTI analyzed a different approach to high-level synthesis, based on the Khronos Group's Read more...

Calypto's Catapult 8 HLS: C-Based Hardware Design Matures

High-level synthesis (HLS) is a trend that BDTI has been following for quite some time, beginning with its several-decade-old academic foundations. Most commercial high-level synthesis efforts have focused on C-based design (whether ANSI C, C++ or SystemC), with toolsets that provided for translation of functionality defined at the behavioral level into logic at the register transfer level (RTL). In 2010, BDTI published certified HLS tool evaluation results for AutoESL's AutoPilot and Synopsys Read more...

Altera Expands Floating-Point Hardware Support Across Its Product Lines

Included in an article on FPGA benchmarking in the September 2011 edition of InsideDSP, BDTI wrote: In design situations where optimum performance and/or power consumption is required, implementing digital signal processing functions in dedicated hardware versus software becomes an attractive proposition. A FPGA is a particularly compelling silicon platform for realizing this aspiration, because it conceptually combines the inherent hardware attributes of an ASIC with the flexibility and time- Read more...

Altera's Next-Generation FPGAs: Advanced Process Lithographies Lead to Performance, Power Consumption Efficiencies

Intel is widely regarded as being not only the world's largest semiconductor supplier, but also a leading-edge manufacturing process developer and implementer. While foundries such as TSMC are still finalizing their 20 nm processes, for example, Intel has been shipping 22 nm-based production ICs ("Ivy Bridge" CPUs) since May of last year; the company had previously showcased its first 22 nm test wafer at the September 2009 Intel Developer Forum. Intel similarly achieved a several-year Read more...

BDTI Evaluates Floating-Point DSP Performance and Energy Efficiency of Altera 28 nm FPGAs

Back in September 2011, an InsideDSP article described a just-published analysis conducted by BDTI and sponsored by Altera, evaluating the viability of implementing complex hardware-accelerated single-precision floating-point functions on FPGA fabric. As I wrote then: To date, FPGAs have been used almost exclusively for fixed-point digital signal processing functions. Although FPGA vendors have long offered floating-point primitive libraries, the performance of FPGAs in floating-point Read more...

Altera's OpenCL SDK: High-Level Synthesis Done A Different Way

Within a technical article published in the August 2012 edition of InsideDSP, I wrote: As FPGAs have evolved, the means by which engineers create FPGA designs have also evolved. In particular, design techniques employing increasingly higher levels of abstraction have been required to address the increasing chip capabilities. Initial FPGA design flows were schematic-based. These later gave way to HDLs (hardware description languages) such as VHDL and Verilog. And more recently, high-level Read more...