On August 11, Analog Devices (ADI) introduced a new chip in its floating-point DSP line, the ADSP-21262. The ’21262 is based on ADI’s dual-MAC SIMD core, which ADI originally dubbed “Hammerhead.” ADI now refers to the ’21262 as a “third-generation SHARC,” presumably to emphasize the chip’s assembly-code compatibility with the earlier ADSP-2106x chip family and to differentiate these two families from ADI’s high-performance TigerSHARC chips. The ’21262 is currently sampling at 200 MHz and 1.2 volts and is priced at $14.95 in 10,000-unit quantities. The chip targets audio, automotive, medical, and voice recognition applications.
The new chip is significantly better than previous SHARC processors on virtually every metric. At 200 MHz, it is twice as fast as earlier SHARCs, but is only about two-thirds the price. ADI has also managed to bring the SHARC within striking distance of the speed of TI’s fastest TMS320C67x. The 225 MHz ’C6713 has a BDTImark2000™ score of 1100, compared to a score of 950 for the ’21262. The 225 MHz ’C6713 costs nearly twice as much as the ’21262, however, giving ADI an advantage in cost-effectiveness.
The ’21262 is much slower than ADI’s own TigerSHARC family, which operates at speeds of up to 600 MHz. But even the cheapest TigerSHARC family member costs about 2.5 times more than the ’21262. Perhaps more importantly, TigerSHARC is not code-compatible with SHARC processors.
By migrating to a 1.2-volt process, ADI has significantly improved the ’21262’s energy efficiency relative to earlier family members. At 1.2 volts, the ’21262 is nearly four times as energy efficient as the ’21161 at 1.8 volts (in terms of BDTImark2000™ /mW). In contrast, the 1.2-volt ’C6713 is about 25% less energy efficient than the ’21262.
In the past few months ADI has doubled the clock rate of both of its key floating-point architectures—first TigerSHARC, and now SHARC. It appears that ADI has no intention of ceding the pole position in the floating-point DSP market.
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