In his keynote address at last month’s International Signal Processing Conference, Professor Alan Oppenheim showed how traditional signal processing methods can clash with advances in computing hardware. Professor Oppenheim compared two approaches to implementing the discrete Fourier transform. Most DSP engineers assume that the usual approach, the fast Fourier transform (“FFT”), is always the most efficient. However, Professor Oppenheim showed that the FFT is less efficient than other approaches on some important classes of processors.
Professor Oppenheim’s talk pointed to a growing problem in DSP: outdated assumptions lead engineers to pursue the wrong goals. For example, the FFT is designed for systems where computational resources are the main performance bottleneck, but in some modern systems, communications resources are the real bottleneck. Yet many engineers are prone to blindly using the FFT because of its traditional performance advantages.
These same outdated assumptions are afflicting DSP processor design. To a large extent, DSP processor design is driven by the historical expense of key processor resources—and not by a search for optimal processing methods. In the first generation of DSPs, computational units were extremely expensive; the multiplier unit alone occupied a quarter of the die area. As a result, computational units have been treated like royalty. Traditional processor designs surround a handful of computational units with legions of subservient registers, buses, and other supporting hardware.
The problem with this design is that it involves a huge amount of indirection. To complete a multiplication, for example, the processor must load an instruction, decode the instruction, compute the operand addresses, move the operands from memory into registers… and then finally perform the multiply. And storing the result requires nearly as many steps.
Today, computational units are cheap—and they take up a minute portion of a processor’s real estate. Not surprisingly, modern DSPs contain far more computational units than yesterday’s chips. Yet DSP processors still coddle the computational units in a vast sea of supporting hardware. This supporting hardware now stands in the way of efficiency. For example, DSPs could be more energy-efficient if they didn’t spend so much juice shuffling data back and forth between memory, registers, and computational units. For general-purpose, non-computationally-intensive tasks, it may still make sense to treat a computational unit like a king. But for DSP applications, it may be time to consider different approaches. Indeed, we expect non-traditional architectures like FPGAs to become increasingly common in signal-processing applications.
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