Xilinx recently introduced two new FPGA chip families, Spartan-6 and Virtex-6 that offer increased capacity and lower power consumption relative to their predecessors. For the first time, the new Spartan and Virtex families use the same underlying architecture to enable easier migration. There are, however, differences in fabrication process and features. Spartan-6 chips will be fabbed in a 45 nm process, while Virtex-6 chips will be fabbed in 40 nm. Spartan-6 chips incorporate DDR3
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BDTI has released BDTI DSP Kernel Benchmarks™ results for the SideWorks signal processing engine from CoreWorks, a Portugal-based vendor of licensable silicon intellectual property. SideWorks is a licensable DSP accelerator targeting cost and power-sensitive applications such as multimedia and communications. The core is both configurable (i.e., hardware resources included in a specific implementation are selected prior to fabrication) and reconfigurable (i.e., the movement of data and some
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BDTI has released the first independent benchmark results comparing the performance of the Sandbridge “Sandblaster” SB3500 multi-core DSP chip to that of massively parallel chips, high-performance DSP processors, and FPGAs.
Sandbridge Technologies, Inc. is a fabless semiconductor company that sells multi-core chips targeting mobile 3G and 4G baseband and multimedia processing. The SB3500 chip includes three DSP cores along with an ARM core; each of the DSP cores supports four-way
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“Connected devices” make up much of the buzz in consumer electronics these days. They are the closest thing to a “killer app” there is—but what exactly are they? All connected devices provide some sort of connection to the ‘net, many provide multimedia functionality, and more often than not, they’re for mobile use. But despite these common characteristics, connected devices span a wide range of features and functionality, from netbooks to smartphones.
Such a wide range of applications
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So I’m sitting at the Las Vegas airport last week, on my way home from CES, trying to get some work done on my laptop—but I can’t. Why? Approximately every eighth word is an expletive.
It reminded me of how, a few weeks ago on a train, I was treated to a loud, slightly slurred, play-by-play account of a young woman’s recent sexual exploits, as she recounted them to a friend via cell phone.
Please, people, I am trying to concentrate here!
“Geez,” I think, “Why can’t these people get
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In the last few years, there have been a slew of massively parallel chip vendors entering the embedded processor market. The massively parallel approach has become more accepted since Intel commercialized its multi-core PC architecture. It’s still a difficult area in which to build a successful business, however, because it requires not only creating a good architecture, but also developing a sound programming model and competent development tools. Even traditional processor start-ups fail at
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ST Microelectronics recently announced a new library of digital signal processing software components for its low-cost microcontroller family, the STM32. STM32 chips are based on ARM’s Cortex-M3 core, and they target low-cost embedded applications, particularly motor control. The software component library includes a speech codec and variety of DSP and control-oriented functions, such as FIR and IIR filters, a PID controller, and an FFT. The PID controller is available in both C and assembly
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Processor and SoC vendors are always looking for the next “killer app.” To enter a new market, though, vendors face two key challenges. First, they must ensure that their product is competitive; and second, they must convince prospective customers of their product’s advantages. These challenges are tough to overcome in new markets due to a lack of well-understood application requirements and established benchmarks. In addition, it is often difficult to obtain reliable information about
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I recently read a license agreement for a suite of software development tools and discovered some interesting fine print: the agreement prohibits licensees from benchmarking the tools. Well, it doesn’t prohibit benchmarking per se, but it prohibits disclosure of any results.
Although my company, BDTI, is a benchmarking company (and we benchmark tools as well as processors), we weren’t planning on benchmarking these particular tools. We bought them for use on a software development project
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High data rates pose a number of system design challenges. They require lots of I/O and an extremely fast processor or FPGA, they need lots of memory for storage and buffering, and they eat power as data gets shipped all over the system. That’s why, when high-speed data gets to a processor, often the first thing that’s done is to compress it. But what if you could compress the data before it ever gets to the processor and before it gets shipped around the system? What if you could compress it
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