InsideDSP — In-depth analysis and opinion

Xilinx Unveils High-Performance ARM-based CPU-FPGA Hybrid Platform

Xilinx recently unveiled a new chip architecture integrating an ARM processor with an FPGA fabric. This platform centers around a dual-core ARM Cortex-A9 processor complex, including hardened memory interfaces and peripherals.  The platform architecture, shown in Figure 1, is intended to behave like a CPU first and an FPGA second.  Specifically, the CPU will boot independently—without requiring that the FPGA first be configured.  Xilinx is targeting markets that require both complex software Read more...

Jeff Bier’s Impulse Response—DSP Processors Must Adapt or Die

For 25 years, DSP processor vendors have benefited from a very powerful secret weapon: extremely talented, hard-working customers.  These customers understood their applications and algorithms inside and out.  They were experts on processor instruction sets.  They studied every nuance of microarchitecture, from pipelines to memory bank structures.  And they spent countless weeks applying that knowledge to create dazzlingly efficient implementations of their applications on DSP processors. Read more...

Case Study: Is Your Development Kit Ready for Customers?

Time-to-market pressures mean that system designers, software developers and hardware designers require more than just chips from their chip vendors. They demand reliable, easy-to-use software development tools, OS support, middleware and application software components, I/O support, and more—right out of the box. To win design-ins, a chip vendor must deliver much more than just processing performance on a board. Vendors are responding to this demand by packaging specialized boards, development Read more...

Analog Devices Introduces Lower-Cost SHARC Processors

Analog Devices, Inc (ADI) has announced new members of its floating-point SHARC processor family featuring lower prices and offering LQFP packages, which are easier to use in older, lower-cost manufacturing facilities. The new SHARC products target digital audio, industrial, automotive, and medical markets.  New ADSP-2147x chips feature lower power than previous SHARC products, while ADSP-2148x parts feature high performance with greater integration. These parts include on-chip memory of up to Read more...

Jeff Bier’s Impulse Response—High-Level Synthesis Tools for FPGAs: A Disruptive Technology?

In 2002, BDTI published the first rigorous, independent benchmarking study comparing the signal processing capabilities of high-end FPGAs to those of high-performance DSP processors. We benchmarked both technologies on the same demanding, highly-parallelizable multi-channel wireless application, and we looked at how many channels could be supported on each chip and the corresponding cost per channel.   We knew that FPGAs had begun to find use as high-end signal processing engines, but we were Read more...

Case Study: Reliable Benchmark Results Lead to Good Design Decisions

To paraphrase business guru Peter Drucker, “If you can’t measure it, you can’t design it.”  In the world of embedding processing, processor developers and users alike rely on benchmarks to measure and assess the capabilities of embedded processors on their target applications.  Benchmark results enable processor developers to understand where they stand in relation to their design targets and their competitors.  And in order to build competitive product and get to market quickly, system and Read more...

Synfora’s PICO High-Level Synthesis Tool Achieves BDTI Certification

BDTI recently completed an in-depth evaluation of Synfora’s PICO tool through the BDTI High-Level Synthesis Tool Certification Program™.  BDTI evaluated the process of implementing applications on a Xilinx FPGA using PICO, comparing it with traditional FPGA design based on hand-written RTL code, and with DSP processor software development.  PICO enabled creation of efficient FPGA implementations, with design productivity comparable to that of DSP processor software development.  The Read more...

Jeff Bier’s Impulse Response: Change or Be Changed

We’re on the cusp of profound changes in the competitive landscape for embedded processing engines—changes that I believe will “shuffle the deck” with respect to which kinds of architectures are dominant in many applications.  Consider this scenario: You’re a systems engineer working on the next generation of your digital-signal-processing-oriented product. You need to upgrade processors because the one you’ve got won’t cut it.  Perhaps it’s not fast enough.  Or maybe it doesn’t have Read more...

AutoESL’s AutoPilot High-Level Synthesis Tool Achieves BDTI Certification

BDTI recently completed an in-depth analysis of AutoESL’s AutoPilot high-level synthesis tool via the BDTI High-Level Synthesis Tool Certification Program™. BDTI evaluated the process of implementing applications on a Xilinx FPGA using AutoPilot, comparing it with traditional FPGA design based on hand-written RTL code, and with DSP processor software development. Overall, AutoPilot demonstrated a strong ability to generate high-quality RTL code—with equivalent resource utilization to hand- Read more...

Jeff Bier’s Impulse Response: Compilers Can Erase Architectural Advantages

Back in the early 1990’s, compilers for DSP processors were pretty lame.  Even if a compiler generated code that was functionally correct (which, sadly, wasn’t always the case) the code was usually far from efficient.  At the time, this wasn’t a big deal:  DSP applications were still fairly small (in terms of lines of code), and DSP processor architectures weren’t nearly as complex as they are today. A reasonably skilled DSP software engineer could optimize an application by hand, sometimes Read more...