Substantial industry investment in a particular application, both in terms of silicon devices and the software running on and interacting with them, is often a barometer of that application's transition toward mainstream adoption. This has definitely been the case recently for the practical implementation of computer vision technology, which for decades was limited to academic research and niche commercial uses. Now, however, the steadily improving performance, power consumption and cost-effectiveness of processors, sensors and other hardware building blocks has reached a "tipping point" wherein an abundance of product creators in a variety of markets are implementing vision processing capabilities in their systems and software products... and IC suppliers are enthusiastically responding to this rapidly growing demand.
With respect to vision processors, vendors are aligning along several different product implementation vectors. In some cases, silicon IP providers are developing vision-optimized cores that they license to chip designers. In other cases, chip suppliers - CPU, DSP, FPGA and GPU, for example - are augmenting their products with vision-centric enhancements, either by licensing one of the aforementioned cores from an IP partner or by developing their own cores, hard-wired function blocks, instruction set extensions, etc. And occasionally, a chip vendor will decide to develop a full-blown SoC specifically tailored for practical computer vision (i.e. "embedded vision") applications. Such is the case with Inuitive, for example, which joined the Embedded Vision Alliance earlier this year. And it's also the case with Movidius, which to date has developed two generations of vision processors.
One of the notable customers for Movidius' first-generation Myriad processor is Google, who is using the product in its Project Tango depth-sensing prototype smartphone. Google's Johnny Lee spoke about Project Tango and its Movidius foundation at a recent Embedded Vision Alliance Member Meeting; here's the video of his talk:
Another notable Myriad 1 adopter is CENTR, which is harnessing the chip's computational photography capabilities to stitch together the outputs of four HD video cameras into 360 degree panorama images in real time, with multi-hour battery life and at a consumer-friendly price point. You can see the company's CTO, Paul Alioshin, compare the Movidius processor to several common application processors at ~18:00 in the following video, from a presentation at that same Alliance Member Meeting:
So what does the newly introduced Myriad 2 deliver versus its precursor? A "20x gain in energy efficiency for computational imaging and visual awareness applications," quotes the press release, echoed by comments from company CEO Remi El-Ouazzane during a recent briefing. The company achieves this notable claimed advancement in part by migrating the second-generation architecture ("built from the ground up," according to El-Ouazzane) from a 65 nm LP (low power) to 28 nm HPM (high performance mobile) manufacturing process (Figure 1). Doing so enabled the company to boost speed while simultaneously lowering power consumption; Myriad 2 runs at a nominal 600 MHz, with as-needed transient "turbo" mode increases beyond that threshold, while Myriad 1 was a 180 MHz device.
Figure 1. An aggressive lithography migration is at the nexus of Movidius' Myriad 1-to-2 advancements.
The increased transistor budget afforded by the lithography transition also enabled the company to cost-effectively integrate additional on-chip processing resources. Whereas Myriad 1 included eight vision-tailored processing "engines," Myriad 2 includes twelve; Movidius also evolved its vector SIMD architecture in the process. New to Myriad 2 are more than twenty vision-specific hardware filters and other accelerators, including multiple high throughput pixel processors, a HOG (histogram-of-oriented-gradients) accelerator, and a bicubic sampler. Interconnecting them all, along with 2 MBytes of vSRAM, is a high-speed (nearly 0.5 TByte/sec of aggregate internal bandwidth) interconnect fabric. Myriad 2 supports up to six HD camera inputs simultaneously via 12 MIPI lanes. And an optional dual-die "stacked" version of the chip integrating 1 Gbit of SDRAM within a common package is also available. See the company-published video for a summary of these features.
The results, according to El-Ouazzane, are staggering albeit application-specific. Myriad 2 is capable of performance exceeding two trillion 16-bit operations per second while consuming an average of less than 500 milliwatts; that full-chip metric includes multiple active camera inputs and memory controllers. The chip delivers a nominal aggregate throughput of 600 megapixels per second. And thanks to the fast on-chip interconnect fabric, this performance is accompanied by low latency; for example, Myriad 2 can calculate 50,000 multi-scale Haar Cascade classifications per HD video frame within seven milliseconds.
El-Ouazzane was careful to point out that the company has no plans to end-of-life Myriad 1, a move that would force existing customers into a costly redesign. With that said, while Myriad 1 and 2 are instruction set-compatible, the second-generation devices employs a different programming paradigm. Movidius has and continues to invest heavily in evolving its processor's compiler and other associated code development resources; more than 90% of the company's 70 employees, according to El-Ouazzane, are software-focused in their responsibilities, as are the bulk of the company's third-party development partners. Quoting from the press release:
Movidius has invested heavily in developing its Myriad Development Kit (MDK). The MDK includes a graphical development environment with all of the tools, libraries, and frameworks necessary to support efficient application development. At the core of the MDK is a code compile flow that supports C, C++, with an OpenCL front-end for maximum flexibility. The MDK provides a groundbreaking development framework for creating arbitrary image/vision processing pipelines with automated support for data scheduling. In addition to using their own proprietary algorithms when building application pipelines, developers have access to a rich set of optimized software libraries including a computer vision library, an image signal processing library, as well as a linear algebra library. Finally, the MDK includes reference applications such as a complete Bayer camera solution, a stereo depth extraction implementation and many others.
Myriad 2 is now sampling to key customers; according to El-Ouazzane, Movidius determines which companies will get access to its technology based not only on expected production volume, but also on product quality, trendsetter potential in new markets, and the ability to establish key customers in multiple market segments. El-Ouazzane forecasts that these initial engagements will ramp into production within twelve months, at which point Myriad 2 will cost "single digits in high volume." Movidius also intends to eventually broaden its customer and market attention beyond today's highly focused approach.
Movidius positions Myriad 2 as both a vision co-processor to a primary system CPU and a primary CPU in specific situations (wearables, for example, and some industrial markets). Will there be a sufficient-sized aggregate market to support a standalone vision (co-)processor chip not only now but in the future? Other vendors, supplying vision-augmented CPUs, DSPs, FPGAs, GPUs and other devices and pointing to the generalized trend of ever-increasing feature subsumation via integration over time, might say that the answer is "no". But El-Ouazzane clearly disagrees with any skeptics; when pressed, he was emphatic that the company's sole focus is and will continue to be on chip sales, with no plans to do core licensing. In fact, he forecasts increased competition from other emerging vision (co-)processor chip suppliers in the near future.
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