When does 1 GHz + 1 GHz  + 1 GHz  + 1 GHz not necessarily equal 4 GHz?  When you’re calculating the performance potential of a multi-core chip. 

In May, fabless semiconductor startup Connex announced its CA1024 processor, which is based on the ConnexArray vector architecture.  After receiving initial funding from In-Q-Tel, a not-for-profit venture group established by the U.S. Central Intelligence Agency, Connex first applied the ConnexArray architecture to database search applications.  Now Connex is setting its sights on high-definition television, hoping to provide a programmable, highly parallel architecture that can compete with ASICs and a growing number of programmable SoCs targeting digital video.

The next time you’re choosing an embedded processor, you should consider choosing an FPGA. This was the take-home message from FPGA vendors at the Embedded Systems Conference Silicon Valley in April—and in my opinion, it’s a message with merit.

Every so often I get a call from someone who wants to know the gate count (or equivalently, the silicon area) of some embedded processor core. And every time this happens, I have to stifle the urge to say “Why on earth do you care?”

I’m starting to wonder if executives at FPGA companies are having conversations like those of the cartoon characters in “Pinky and the Brain”:

Pinky: “Gee, Brain, what are we going to do today?”
Brain: “The same thing we do every day, Pinky—try to take over the world!”