This month Texas Instruments launched the DM355, the latest chip in its “DaVinci” family. The DM355 supports high-definition MPEG‑4 video encoding and decoding (but not both simultaneously) and is intended for low-cost imaging and video applications such as digital still cameras, IP video cameras, digital photo frames and video baby monitors.

BDTI has released the first independent benchmark results comparing the performance of picoChip’s massively parallel PC102 chip to that of high-performance DSP processors and FPGAs.

picoChip is a fabless semiconductor company that sells multi-core chips for wireless infrastructure applications, such as WiMax base stations. The PC102 is based on picoChip’s multiple-instruction, multiple-data (MIMD) architecture and contains 308 heterogeneous processor cores and 14 co-processors, all of which run at 160 MHz.

Texas Instruments recently introduced what it calls "the first floating-point digital signal controller (DSC)." (The term DSC is relatively new in the industry; it refers to a low-cost embedded processor that combines DSP and microcontroller characteristics.) The new chip family, the TMS320F2833x, is based on the company's mature 32-bit fixed-point microcontroller architecture, the 'C28x, but adds a floating-point unit that can perform (among other operations) one 32x32-bit floating-point multiplication per cycle.

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1. (The middle of the family range is filled out by the AV 404V, AV 406V, and AV 407V) are intended for compression-centric applications such as camera phones, portable media players, DVB-H and DVD players.

Pretty much everyone agrees that digital video has become a killer app for embedded processing engines. But “video” can mean different things to different people; the term encompasses a diverse set of applications with very different requirements. A processor you’d use for video playback in a low-cost cell phone, for example, isn’t going to cut it for an HDTV set and vice versa.

Digital video compression/decompression algorithms (codecs) are at the heart of many modern video products, from DVD players to multimedia jukeboxes to video-capable cell phones. Understanding the operation of video compression algorithms is essential for developers of the systems, processors, and tools that target video applications. In this article, we explain the operation and characteristics of video codecs and the demands codecs make on processors. We also explain how codecs differ from one another and the significance of these differences.

Tensilica is now offering a high-performance licensable video engine capable of MPEG-4 ASP encoding at D1 resolution. The processor is called the Diamond 388VDO, and it’s one of four new dual-core “VDO” video engines from Tensilica.  The 388VDO is the highest-performance member of the quartet and supports a variety of video codec standards at resolutions up to D1 (i.e., standard definition television). Target applications include chips for mobile handsets and personal media players.

In June Atmel announced the Customizable Atmel Processor (CAP), a family of customizable microcontrollers, and two initial devices. Customization in the CAP is achieved via a gate array block in which users can implement functions ranging from processor cores and peripherals to algorithm accelerators. Atmel intends the CAP devices to be used in industrial, consumer, medical, and automotive applications, as replacements for the microcontroller-FPGA combinations often used in these applications.