Energy consumption is a chief concern for most embedded applications, especially for portable applications where battery life is paramount. In these applications, an accurate understanding of energy consumption is critical to processor selection and to system design. Unfortunately, many obstacles hinder comparisons of processors’ energy consumption.
One key problem is that processor vendors usually report power consumption, not energy consumption. Calculating energy consumption—which is
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“Connected devices” make up much of the buzz in consumer electronics these days. They are the closest thing to a “killer app” there is—but what exactly are they? All connected devices provide some sort of connection to the ‘net, many provide multimedia functionality, and more often than not, they’re for mobile use. But despite these common characteristics, connected devices span a wide range of features and functionality, from netbooks to smartphones.
Such a wide range of applications
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Processor and SoC vendors are always looking for the next “killer app.” To enter a new market, though, vendors face two key challenges. First, they must ensure that their product is competitive; and second, they must convince prospective customers of their product’s advantages. These challenges are tough to overcome in new markets due to a lack of well-understood application requirements and established benchmarks. In addition, it is often difficult to obtain reliable information about
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When is the right time to adopt a new way of doing things? It’s a no-brainer that systems designers have to select a new tool or component when the one they’ve been using is obsoleted. But should a company adopt a new design methodology when the one they’re using still works? After all, “if it ain’t broke, don’t fix it”—right? Well, maybe.
Established signal processing system design techniques are bending under the pressure of increasing integration, greater application complexity,
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In an ideal world, chip designers would evaluate their new designs on real applications. But who’s got the time to implement an entire cellular baseband or video codec just to see if their proposed design is efficient? That’s the reason chip designers use benchmarks. But benchmarking is not just about selecting the right algorithms. It’s also about careful implementation—careful crafting of software that is appropriately optimized for the target architecture. As a result, sound benchmarking
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Unless you’re announcing a laptop that runs off body heat or similar epochal breakthrough, it’s hard for technology companies to get media attention. And when a product does get editorial coverage, it’s even harder to distinguish what’s true from the infomercials. With every announcement claiming “better,” “new,” and “breakthrough,” what will grab legitimate attention? One ingredient of a successful announcement, PR professionals agree, is compelling data.
In 2007, an early-stage chip
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An attractive attribute of licensable processor cores is the flexibility chip designers have to adapt these cores to their chosen fabrication process, cell library, tool flow, logic synthesis goals and other conditions. In other words, chip designers can tune the core to the needs of a particular application and to their preferred chip design methodology. An unfortunate side effect of this flexibility is that it can be extremely difficult to make apples-to-apples comparisons between
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Digital signal processing algorithms are increasingly important in an expanding range of embedded systems. For example, compute-intensive multimedia functions are finding their way into applications from toys to appliances to telephones. As a result, a growing number of system developers face a daunting challenge: delivering implementations of DSP algorithms that are sufficiently optimized to meet demanding MIPS, memory, and cost requirements while also meeting aggressive schedules. DSP
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Fifteen years ago DSP engineers expected to write and optimize most of their software in assembly language, and they did it on DSP processors with obscure and highly specialized instruction sets. Back then, compilers for DSP processors were inefficient and couldn’t use many of the processors’ specialized performance-improving features. If you wanted to use bit-reversed addressing or circular buffers or fill delay slots, for example, you’d have to write that code yourself.
Today, most
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Developing a new signal processing engine is expensive and risky, particularly for a small start-up or for an established company moving into an unfamiliar market. There are good reasons to take that risk: signal processing has become ubiquitous in a wide range of application areas, and offers the potential for high revenues. The flip side is that the market is already densely populated with all kinds of signal processing engines: single-core chips, multi-core chips, massively parallel
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