BDTI Releases MIPS24KEc Benchmark Scores

Today BDTI released the first independent benchmarks results for the MIPS24KEc licensable processor core. The MIPS24KEc is MIPS’ highest-performance 32-bit core, and it is the first core to incorporate the “DSP ASE” signal-processing instruction-set extensions. (For a discussion of these extensions, see the October 2004 edition of Inside DSP.) BDTI’s analysis shows that these extensions give the MIPS24KEc serious signal-processing capabilities: the MIPS24KEc achieves a BDTImark2000™ score of 1000 at 335 MHz. (All performance data in this article assumes use of the TSMC CL013G process and the ARM Artisan SAGE-X library. For more information, including additional scores, see /Services/Benchmarks.)

The main competitor for the MIPS24KEc is the ARM1136. Architecturally, the MIPS24KEc and the ARM1136 have much in common. For example, the ARM1136 is also a 32-bit general-purpose processor core with signal-processing instruction-set extensions. Not surprisingly, the two cores offer comparable levels of speed: The ARM1136 achieves a BDTImark2000™ score of 1160 at 330 MHz, about 15% faster than the MIPS24KEc. However, BDTI’s analysis shows that the MIPS24KEc is about 30% more energy-efficient than the ARM1136. The MIPS24KEc is also smaller: It occupies a die area of 2.0 mm², about 30% less than the ARM1136’s die area of 2.85 mm².

In some applications, the MIPS24KEc will compete with mid-range DSP cores. The MIPS24KEc is slower than most of these cores. For example, a survey of BDTIsimMark2000 scores show that the MIPS24KEc is about 40% slower than the Starcore SC1200 and the LSI Logic ZSP500. Where the MIPS24KEc has a notable advantage is in applications where it can replace a general-purpose processor combined with a separate DSP. In such applications the MIPS24KEc will occupy less die area than the combined general-purpose processor and DSP.

The MIPS24KEc also has an advantage in that its programming model is simpler than the programming model for a combination of general-purpose processor and DSP. However, it should be kept in mind that the signal-processing-oriented application development infrastructure available for typical DSP cores (including things like tools and software components) is much richer than that available for the MIPS24KEc. This may offset the advantage the MIPS24KEc gains from its simpler programming model.

Indeed, the main challenge for MIPS will be to provide tools and software so developers can make full use of the core’s capabilities. ARM’s cores are supported by an extensive selection of tools, software components, and other development infrastructure for general-purpose computing. It will be difficult for MIPS to match these offerings. Likewise, it will be difficult for MIPS to match the signal-processing-oriented development infrastructure available from leading DSP licensors such as CEVA. Given these challenges, MIPS’ best strategy may be to focus its infrastructure-development efforts on a few key applications.

The MIPS24KEc is currently available for license. MIPS has not disclosed the licensing fees or royalties for this core.