Processors

Jeff Bier’s Impulse Response—Embedded Processor Wars

For a while there, it seemed as though DSP processors and general-purpose processors (GPPs) were morphing into one another. In an effort to provide better DSP performance, general-purpose processors (GPPs) were incorporating increasingly powerful DSP-oriented features. Meanwhile, as digital signal processing applications got more complex, DSP processors were becoming more CPU-like to enable efficient compilers and support more elaborate operating systems. It was getting hard to tell the DSPs Read more...

Evaluating the DSP Capabilities of the Cortex-R4

In 2004, ARM announced its newest generation of licensable cores, called the “Cortex” family.  Cortex cores span a wide range of performance levels, with Cortex M-series cores at the low end, Cortex R-series cores providing mid-range performance, and the Cortex A-series applications processors offering the highest performance.  The first Cortex core to be announced was the Cortex-M3, and since then ARM has announced several others, including the Cortex-A8 and A9, the Cortex-M1, and the Cortex- Read more...

Qualcomm Reveals Details on Scorpion Core

Back in 2005, Qualcomm announced that it had licensed the ARMv7 instruction set architecture and was working with ARM to create its own high-performance core based on that architecture. The new core was dubbed “Scorpion,” and at the time it was announced, Qualcomm didn’t disclose much about it except that it would run at 1 GHz in a 65 nm process and would be customized to provide a high level of performance and energy efficiency in its target mobile applications. Exactly how this combination Read more...

Avnera releases ASSPs for wireless audio applications

Avnera has released a set of application-specific standard product (ASSP) chips aimed at the audio market.  Avnera’s chips, implemented in CMOS, transmit and receive stereo audio (close to CD quality) over the 2.4 GHz wireless ISM band assigned internationally for industrial, scientific and medical uses.   Avnera claims a typical range of 45 feet, with longer range if an optional external power amplifier is used. Figure 1.  Avnera implements wireless audio with a transmitter chip and a Read more...

ARM Extends Multi-Core Strategy with Cortex-A9

ARM recently announced the Cortex-A9, a high-performance licensable application processor that extends ARM’s push into the multi-core arena. The Cortex-A9 provides support for multi-core implementations via ARM’s “MPCore” technology, which includes hardware for maintaining cache coherency and managing memory transfers. MPCore can be used with up to four Cortex-A9 cores in a symmetric multiprocessor (SMP) configuration. The Cortex-A9 is also available as a single processor (i.e., without the Read more...

BDTI Releases Benchmark Results for Massively Parallel picoChip PC102

BDTI has released the first independent benchmark results comparing the performance of picoChip’s massively parallel PC102 chip to that of high-performance DSP processors and FPGAs. picoChip is a fabless semiconductor company that sells multi-core chips for wireless infrastructure applications, such as WiMax base stations. The PC102 is based on picoChip’s multiple-instruction, multiple-data (MIMD) architecture and contains 308 heterogeneous processor cores and 14 co-processors, all of which Read more...

Massively Parallel Processors for DSP: Development Tools

The number of vendors offering massively parallel processors for digital signal processing is growing.  As independent technology analysis company BDTI explained in its earlier article, there are a wide range of architectural approaches, each with unique pros and cons. Regardless of the approach taken, these chips are all highly complex, and they all face a similar challenge: making it easier for users to get their applications up and running. In this article BDTI will discuss some of the new Read more...

ARC Introduces Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1. (The middle of the family range is filled out by the AV 404V, AV 406V, and AV 407V) are intended for compression-centric applications such as camera phones, portable media players, Read more...

How Video Compression Works

Digital video compression/decompression algorithms (codecs) are at the heart of many modern video products, from DVD players to multimedia jukeboxes to video-capable cell phones. Understanding the operation of video compression algorithms is essential for developers of the systems, processors, and tools that target video applications. In this article, we explain the operation and characteristics of video codecs and the demands codecs make on processors. We also explain how codecs differ from Read more...

Tensilica Offers High-Performance Licensable Video Engine

Tensilica is now offering a high-performance licensable video engine capable of MPEG-4 ASP encoding at D1 resolution. The processor is called the Diamond 388VDO, and it’s one of four new dual-core “VDO” video engines from Tensilica.  The 388VDO is the highest-performance member of the quartet and supports a variety of video codec standards at resolutions up to D1 (i.e., standard definition television). Target applications include chips for mobile handsets and personal media players. In its Read more...