March 13, 2013 | Write the first comment.
Back in September 2011 , an InsideDSP article described a just-published analysis conducted by BDTI and sponsored by Altera, evaluating the viability of implementing complex hardware-accelerated single-precision floating-point functions on FPGA fabric. As I wrote then: To date, FPGAs have
Within a technical article published in the August 2012 edition of InsideDSP , I wrote: As FPGAs have evolved, the means by which engineers create FPGA designs have also evolved. In particular, design techniques employing increasingly higher levels of abstraction have been required to
Over the past 25 years, programmable logic devices have grown in capacity and capability through lithography advancements and the integration of specialized functional blocks. First were dedicated memory arrays derived from the same SRAM used to build logic cells. Next came dedicated-function
BDTI Study Validates FPGA Floating-Point Digital Signal Processing Viability, Altera Design Toolset Capabilities
In design situations where optimum performance and/or power consumption is required, implementing digital signal processing functions in dedicated hardware versus software becomes an attractive proposition. A FPGA is a particularly compelling silicon platform for realizing this aspiration,
March 30, 2011 | Write the first comment.
In early 2010, Xilinx previewed its vision for what it calls an “extensible processing platform”—a highly integrated combination of a high-performance embedded processor subsystem and an FPGA. Earlier this month, that vision came one step closer to reality with
Xilinx has acquired high-level synthesis start-up AutoESL Design Technologies, bringing the AutoPilot high-level-synthesis tool in-house. AutoPilot accepts a C, C++, or SystemC description of the functionality of an algorithm or task and generates a register-transfer-level (RTL) implementation
Xilinx recently announced its next-generation “7 series” FPGAs, featuring new power-saving features as well as increased capacity and performance. The series will be composed of three chip families, all fabricated in TSMC’s high-k metal gate (HKMG) 28 nm technology.
Altera recently disclosed architecture details of its next generation Stratix V FPGA family. The architecture features a variable-precision DSP block, designed to provide better resource utilization for algorithms requiring a variety of data widths. Altera represents this approach
May 20, 2010 |
Posted in Automotive, Communication, FPGAs, Low-Power, Processors, Software Development, Tools, Video| Write the first comment.
Xilinx recently unveiled a new chip architecture integrating an ARM processor with an FPGA fabric. This platform centers around a dual-core ARM Cortex-A9 processor complex, including hardened memory interfaces and peripherals. The platform architecture, shown in Figure 1, is intended to
BDTI recently completed an in-depth evaluation of Synfora’s PICO tool through the BDTI High-Level Synthesis Tool Certification Program™. BDTI evaluated the process of implementing applications on a Xilinx FPGA using PICO, comparing it with traditional FPGA design based on