- Jeff Bier’s Impulse Response—Consumer Electronics Begin to See
- With SDAccel, Xilinx Embraces OpenCL
- Case Study: Choose Your Desert Island Companion Wisely
- Calypto's Catapult 8 HLS: C-Based Hardware Design Matures
- SequenceL Programming Language, Toolset Strive to Leverage Multi-Core Processor Potential
The title of the press release for CEVA's latest XC-4500 communications DSP core , introduced in mid-October, claims that it's the "World's First Vector Floating-Point DSP for Wireless Infrastructure Solutions." Those of you with good memories might be confused at this
May 22, 2013 | Write the first comment.
The cellular base station and its associated infrastructure topology have remained largely unchanged throughout the industry's history to date, although upgrades have periodically occurred to address the needs of evolving voice and data standards. Within each base station are beefy
Adapteva's Epiphany Floating Point Processor Core: A Leading-Edge Lithography May Finally Open Doors
September 04, 2012 | Write the first comment.
Cost- and power consumption-sensitive digital signal processing applications tend to leverage fixed point processors, for a common fundamental reason: fixed-point processor cores are substantially less complex than their floating-point counterparts, leading to reductions in transistor count and
March 22, 2012 | Write the first comment.
After some five years of architecture definition work and several years of development, Freescale's new StarCore SC3900 DSP core will see its first silicon implementation next quarter in the QorIQ Qonverge B4860 processor for macrocell base station designs, unveiled last month at the Mobile
Technology advances ever onward over time, and in fact its pace has accelerated since Jack Kilby's initial integrated circuit demonstration in 1958. So it is that, while CEVA's DSP core licensees are demonstrating SoCs based on the company's current-generation CEVA-XC323 (see
The dearth of available wireless spectrum throughout the world, notably in the United States, is one of technology's hottest topics. It's driving network management policies such as bandwidth throttling, data usage caps, and blocks of particular ports, protocols and services, any or all
Next-Generation Power Architecture-Based SoCs Embrace Advanced Lithography, Core Virtualization, SIMD Instruction Set
Freescale's re-engagement with historical Power Architecture (previously known as PowerPC) CPU business segments, such as communications, industrial, medical, military, robotics, and surveillance systems, began in earnest at the June 2008 Freescale Technology Forum when the company unveiled
Texas Instruments (TI) is continuing to expand its cellular base-station SoC family, incorporating multiple instances of the TMS320C66x (C66x) DSP core that the company introduced in early 2010 . The new TMS320TC16612 (TCI6612) and TMS320TC16614 (TCI6614) chips target femtocell (approximately
Near-field communications (NFC), which traces its heritage to radio-frequency identification (RFID), has lately been promoted as a way to enable mobile phones and other portable devices to serve as electronic wallets. Early examples of the technology, operating on the 13.56 MHz ISO/IEC 18000-3
March 30, 2011 | Write the first comment.
In early 2010, Xilinx previewed its vision for what it calls an “extensible processing platform”—a highly integrated combination of a high-performance embedded processor subsystem and an FPGA. Earlier this month, that vision came one step closer to reality with