It's tough to break the mold. How do you convince an "if it works, don't fix it" group of engineers to try something new?
In 2011 and 2012, Altera Corporation released a new floating-point design flow for its next generation of FPGAs. The design flow was intended to streamline the process of implementing floating-point digital signal processing algorithms on Altera FPGAs, taking advantage of new achitectual features in the silicon itself. The new design flow enabled application designers to create designs that achieve higher performance and efficiency than previously possible and to do it more easily. BDTI evaluated this new approach to assess the performance of the resulting designs and its ease-of-use, then published two white papers, the first examining the design flow for 40 nm FPGAs and the second for 28 nm devices.
Now, implementing floating-point algorithms on FPGAs has traditionally involved a headache-inducing process of building a datapath of elementary floating-point operators. Altera's approach was to use a model-based design flow incorporating a compiler that generates a fused datapath that combines operators into a single function, eliminating redundancies. The result, Altera maintained, was better performance and faster design cycles. But how to convince its customers? This is where BDTI came in.
By engaging BDTI, a trusted, independent third-party, to evaluate its technology, Altera boldly captured the attention of both the DSP application developer and the FPGA design communities. And the project succeeded—according to Altera, the number of downloads of BDTI’s floating-point FPGA white papers was impressive.
Go to the listing of BDTI customer white papers to download the Altera white papers.
To learn how BDTI-branded White Papers can convince even your most skeptical customers of your product's value, call us at +1 (925) 954 1411 or contact us via the web.