- Analog Devices' SHARC Doubles Up, Adds ARM Option
- CogniVue's "Opus" APEX Generation 3: Vision Processing With Implementation Flexibility
- Jeff Bier’s Impulse Response—What Does Semiconductor Industry Consolidation Mean for Embedded Systems Designers?
- Case Study: Independent Evaluation Enables a Development Kit to Hit a Home Run
- Cadence's Tensilica Fusion: DSP for the IoT
Avnera has released a set of application-specific standard product (ASSP) chips aimed at the audio market. Avnera’s chips, implemented in CMOS, transmit and receive stereo audio (close to CD quality) over the 2.4 GHz wireless ISM band assigned internationally for industrial,
Introduction Are you designing a system that involves audio? Maybe an audio product or a product with an audio subsystem? Here are some tips and tricks that may help you. Designing audio systems and debugging audio presents some interesting challenges. Sound is ruthlessly
April 25, 2007 | Write the first comment.
It’s generally accepted that, for processing engines, there is a trade-off between efficiency and generality. The more a chip is geared towards a specific application, the more efficient it’s likely to be (in terms of speed, energy consumption, and cost). On one end of
April 24, 2007 | Write the first comment.
While nearly all signal processing applications require some degree of software optimization, some applications require a sophisticated, multi-tiered optimization approach in order to meet their performance goals. To obtain the most efficient code, DSP software must be optimized at four
February 14, 2007 | Write the first comment.
At the Consumer Electronics Show last month I was struck (not for the first time) by the number of consumer electronics products that rely on digital signal processing—at this point, nearly all of them. In fact, so many of today's products incorporate digital signal processing-based
On January 3rd, Freescale announced the first dual-core members of its Onyx family of audio DSPs. The first two chips in the family, the DSP56720 and DSP56721, feature two DSP5636x cores operating at 200 MHz. The chips mainly target high-definition audio processing in
December 13, 2006 | Write the first comment.
In November Altera announced the Stratix III family, its next generation of field-programmable gate arrays (FPGAs). The new devices will be fabricated in a 65 nm process and feature a number of significant architectural changes. To reduce power consumption, Altera has introduced
This week, Analog Devices introduced four new members of its Blackfin processor family: the ADSP-BF549, ‘BF548, ‘BF544, and ‘BF542. These new devices will operate at clock speeds of up to 600 MHz and are intended mainly for automotive applications that incorporate signal
In September, Texas Instruments, Inc. (TI) announced the TMS320C6720 floating-point DSP. Operating at 200 MHz and priced at a modest $5.75 (unless otherwise stated, all prices mentioned in this article are for 10,000 unit quantities), the chip is the latest and least expensive member of
On September 9th, silicon intellectual property licensor ARC made two related announcements: It unveiled a new configurable multimedia player subsystem based on its ARC600 family of cores, and announced a new partnership with Chinese silicon foundry Semiconductor Manufacturing